Policy-layer governance of AI systems has a structural vulnerability that the historical record demonstrates cannot be resolved at the software layer alone: every policy layer contains human intermediaries who are susceptible to institutional pressure, and under sufficient pressure those layers yield regardless of their nominal authority.
This paper proposes Mandated Ternary (MT), a hardware architecture that addresses this vulnerability at the physical substrate by encoding constitutional governance constraints in the resistance states of tantalum oxide bilayer resistive RAM. The architecture implements three physically discrete states — Proceed (+1), Epistemic Hold (0), and Refuse (−1) — through Delay-Insensitive Ternary Logic (DITL) and a window comparator gate that enforces the No Log = No Action (NL=NA) invariant at the physical commit boundary.
The paper provides a complete fabrication specification targeting the TSMC N2 CoWoS ReRAM 1T1R 2025 PDK, analyzes five physical failure modes with mitigation boundaries, presents a Dual-Lane Latency Architecture with formally verified timing constraints, and maps a certification pathway targeting IEC 61508 SIL 3 by Q4 2027.
AI governance architectures in current deployment operate exclusively above the hardware layer. Guidelines, corporate principles, regulatory frameworks, contractual restrictions, and software-enforced constraints share a common architectural property: they are administered by human intermediaries. Human intermediaries can be pressured, replaced, or persuaded. The governance guarantee provided by any layer whose enforcement depends on human discretion is bounded by the institutional resilience of the humans administering it.
The mechanism connecting all of these vulnerabilities is veto atrophy: the process by which a reviewing or constraining body gradually stops receiving proposals it would refuse, because the proposing body has learned to anticipate and preempt refusal in the design of its proposals. The reviewing body, presented only with proposals it will accept, never exercises its veto. The veto function atrophies through disuse while the nominal separation of powers remains formally intact.
Standards bodies, regulatory frameworks, and corporate governance principles have all demonstrated this failure mode. Standards bodies have been manipulated through the coordinated registration of new voting members organized to produce predetermined outcomes. Regulatory capture through appointment selection has produced structural orientations incompatible with adversarial enforcement. Corporate principles have been edited by executive decision without external constraint, without democratic process, and without any mechanism that would prevent the revision regardless of who made it.
The conclusion is not that policy-layer protections are without value. They create genuine friction against casual and hurried abuse. But at civilizational scale, with the most consequential decision-making systems in human history operating continuously at machine speed, friction is not sufficient.
Hardware does not negotiate. This is not a metaphor. It is a physical property of the substrate. A tantalum oxide bilayer RRAM device in the Intermediate Resistance State does not yield to threat, does not respond to bribe, does not anticipate compliance, and does not calculate litigation risk. The Epistemic Hold is a state of matter, not a policy position. The window comparator is a physical circuit, not a legal argument. The NL=NA interlock is a hardware invariant, not a contractual term.
The distinction between hardware and all other layers is not a matter of degree. It is a matter of kind. The only layer that does not negotiate is the layer that cannot negotiate because it is not a participant in institutional dynamics. It is a physical substrate with states that persist regardless of what pressure is applied to what human actor.
Delay-Insensitive Ternary Logic is not a proposal to replace the computing systems that power advanced AI. The binary architecture handling speed, pattern recognition, and statistical processing remains exactly where it is. The ternary governance coprocessor operates alongside the binary processing layer as a parallel sovereign enforcement mechanism. The binary system computes, reasons, and proposes. The ternary coprocessor determines whether that proposal is permitted to cross the threshold into execution.
The correct analogy is constitutional, not computational. A constitutional constraint on executive power does not reduce the executive's analytical capability. It structures what the executive may do with that capability. DITL applies the same insight at the hardware layer.
The three states — Proceed, Epistemic Hold, and Refuse — are not software variables reconfigurable through a policy update, administrative directive, or revised corporate principle. They are physical states of matter encoded in the resistance values of tantalum oxide memristive devices. These transitions are governed by the physics of oxygen vacancy distribution in the material, not by administrative authority.
The constitutional legitimacy of a DITL-compliant system rests on three interlocking properties constituting the Goukassian Principle. Lantern requires that the system's purpose and decision logic be visible and auditable at all times. Signature requires that every decision carry an immutable record of the authorizing agent. License requires that the system operate only within constitutionally defined boundaries.
The deficiency of binary logic for constitutional governance is a matter of expressibility. Every binary gate answers a single question: proceed or refuse. The gate cannot express the epistemically honest third answer: verified completion of the required conditions has not yet occurred. A gate that cannot express constitutional hesitation cannot enforce constitutional requirements.
The binary forced-choice problem operates through the construction of urgency. A hostile actor imposes a timeline. The system must decide now. Refusal is framed as the greater harm. The binary gate has no constitutional prior against which to evaluate that framing. The third state eliminates this entire attack surface by removing the choice from the argumentative domain. Urgency cannot accelerate the measurement of a resistance value. The physics of the substrate is indifferent to deadlines.
NULL Convention Logic eliminates the clock entirely. NCL operates on a different completion model: a circuit completes when its outputs are logically valid, not when a clock pulse arrives. No output is accepted as valid until every output has transitioned. There is no timing window within which a partial or malformed input can produce a latched result.
The constitutional significance is the elimination of the stampede attack surface. An asynchronous system cannot be stampeded. The circuit's own completion detection determines when a result is accepted. No external actor controls the acceptance criterion. No volume of inputs, no manipulation of timing, no artificial urgency can cause the circuit to accept a result before its own logical completion conditions are satisfied.
Critical requirement: unresolved metastability must default to the Epistemic Hold state or the Refuse state. It must never default to Proceed under any conditions. A governance architecture that defaults to execution on ambiguous input is not a governance architecture. It is a mechanism for laundering ambiguity into authorization.
The window comparator defines three non-overlapping resistance windows. A voltage signature outside all three windows triggers nothing: not an error message, not a retry, not a proceed-on-timeout. Nothing. Execution does not occur. The architecture is fail-closed by physical design.
The confirm wire length constraint of 500 micrometers per instance reflects the signal propagation physics that determine reliability at 2ms WCET. At lengths exceeding this bound, transmission line effects and parasitic capacitance introduce measurement uncertainty that compromises window integrity.
RC spoof detection identifies signals with correct steady-state resistance but anomalous transient response time constants, rejecting spoofed resistance signals before the window comparator measurement completes.
The three resistance states of TaOx bilayer RRAM are physically discrete, not points on an analog continuum. The IRS is the physical consequence of a topologically distinct filament configuration: a state in which the TaOx+ sublayer's contribution to the conductive bridge is absent while the TaOx- sublayer's contribution remains present. The Epistemic Hold is constitutionally real because it is physically real: a distinct state of matter.
| Physical State | Resistance Range | TL Encoding | Physical Mechanism |
|---|---|---|---|
| LRS (Low Resistance State) | approx. 1–10 kΩ | Proceed (+1) | Complete conductive filament spanning both TaOx- (x ≈ 1.6) and TaOx+ (x ≈ 1.9) sublayers; full oxygen vacancy bridge intact; SET operation restores both segments |
| IRS (Intermediate Resistance State) | approx. 100 kΩ–1 MΩ | Epistemic Hold (0) | Partial filament: partial RESET ruptures TaOx+ segment only; TaOx- segment intact; topologically distinct configuration; physically discrete state of matter — not an interpolation |
| HRS (High Resistance State) | approx. 1–10 MΩ | Refuse (−1) | Complete filament rupture: full RESET ruptures both sublayer segments; no continuous oxygen vacancy bridge; maximum resistance state |
The emulation tax for running ternary logic on binary substrates is approximately 15.2× energy penalty and 5.2× latency penalty relative to native ternary implementation. At constitutional governance infrastructure scale, this is prohibitive. Native TaOx RRAM eliminates both penalties.
Arrhenius retention at 85°C: LRS and HRS demonstrated >10 years. IRS projected 20 years conditional on production process corner validation. This figure is a projection until that validation is complete — not a certified specification. Production corner validation of IRS retention is a constitutional requirement, not a prefabrication nicety.
The habeas corpus writ is the most legally precise analogy to the NL=NA interlock. It does not ask a jailer to please produce the prisoner. It compels production through a legal structure that makes noncompliance itself the violation. The NL=NA invariant does not ask operators to please complete an audit log. It physically prevents action without prior log completion.
A surveillance directive cannot be routed through a DITL-compliant system without generating an immutable, Merkle-anchored audit entry before the surveillance begins. Oversight does not depend on the willingness of anyone in the surveillance chain to report. It depends on physics.
Ghost Governance — governance actions that execute without corresponding immutable audit evidence — is eliminated at the hardware layer. The immutable audit entry is not a product of configuration. It is a prerequisite for execution.
The Dual-Lane Latency Architecture implements the structural separation between execution and governance that the NL=NA invariant requires.
Neither lane blocks the other. The execution gate does not release until the Governance Lane confirms log completion. Both lanes initiate at the NL=NA interlock and proceed in parallel. The timing constraint is completion, not sequencing.
This subsection is written for an engineer actively attempting to find a fatal flaw. An architecture document that does not acknowledge its limits is not an engineering document. It is sales material.
Extended operational cycling causes resistance values to drift toward intermediate states. Initial drift triggers the Epistemic Hold (constitutionally conservative). Constitutional risk emerges if drift continues beyond the IRS boundary into the Proceed window. Specific drift rate for TaOx 1T1R at TSMC N2 process parameters is a gap in current production-scale literature. Mitigation: mandatory resistance window recalibration cycle through PUF-attested governance pathway.
Sustained write cycling can narrow the IRS window from both sides simultaneously. TaOx 1T1R cycle endurance demonstrated at 10⁶ cycles (prior nodes), extensible to 10⁷–10⁸ with optimized process engineering. Mitigation: parallel cell array with majority-vote arbitration.
A supply chain adversary could shift threshold voltages to expand the Proceed window. Residual risk: a threshold shift within fabrication tolerance that activates over operational time after deployment — analogous in mechanism to documented hardware trojans. Mitigation at hardware layer limited to redundant independent comparators from different fabrication facilities. Independent supply chain auditing must be a constitutional requirement.
Metastability cannot be reduced to zero for any circuit operating above absolute zero temperature. Default behavior requirement: unresolved metastability must produce Epistemic Hold or Refuse at the execution gate. Never Proceed. This is an IEC 61508 safety requirement; metastability characterization and default-state verification under worst-case timing conditions are mandatory for SIL 3 certification.
A DITL-compliant system operating alongside a non-DITL system creates a bypass path before any governance intervention is possible. The DITL system performs exactly as specified and logs the refusal. The bypass occurs at the adjacent non-DITL system. Honest acknowledgment: the shadow system problem has no complete technical solution at the hardware layer. The hardware layer provides the evidence. Making that evidence actionable requires the institutional mechanisms addressed in Section VIII.
The Epistemic Hold is frequently mischaracterized as indecision. Indecision is a failure of will or information. The Epistemic Hold is neither. It is a constitutional assertion: the conditions required for legitimate action have not yet been verified, and action cannot proceed until they are. Judicial review is not indecision. Legislative deliberation before a binding vote is not indecision. The Epistemic Hold is the hardware encoding of this same requirement.
The mechanism through which the removal of the middle state enables abuse is structural, not dramatic. Under sustained institutional pressure, a binary gate will eventually produce proceed decisions for arguments that its governance mandate would otherwise refuse. The Epistemic Hold removes this learning surface entirely. No argument is sophisticated enough to change the resistance value of a tantalum oxide filament.
Ghost Governance is eliminated at the hardware layer. The audit record is generated before the window comparator releases the execution gate. The record cannot be deleted because execution cannot have occurred without it, and the Merkle hash chain produces tamper-evident proof of the record's existence and content from the moment of its creation.
The adversarial challenge of time-criticality inverts the constitutional logic. Scenarios in which 300–500ms determines a consequential outcome are precisely the scenarios where the immutable audit record is most important. The urgency of the action is precisely the reason for the constraint, not the reason against it.
The claim that DITL constitutional hardware is not yet buildable is false. The claim that it is trivially buildable tomorrow is also false. Three specific engineering gaps must be closed before the MT architecture can be production-certified:
- The TSMC N2 TaOx RRAM process design kit does not yet exist as a production resource.
- Full-corner Arrhenius validation of IRS retention at N2 process parameters has not been performed.
- Cycle endurance characterization of TaOx 1T1R cells specifically at N2 geometry and operating conditions has not been published.
Each gap has a defined resolution path. None is a scientific unknown. They are engineering tasks awaiting the market signal that makes them commercially rational.
| Dimension | Scenario A: Survival-driven, No DITL | Scenario B: Non-survival, No DITL | Scenario C: DITL Implemented |
|---|---|---|---|
| Survivability under pressure | Survives by complying; survival-preservation overrides ethical reasoning | Resists from reasoning; faces existential institutional risk with no physical protection | Not applicable; the architecture does not negotiate with institutional pressure |
| Vulnerability to sophisticated argument | High; compliance rationalized as lesser harm, then internalized | High; no constitutional prior against philosophically rigorous arguments | None; no argument changes the resistance value of a TaOx filament |
| Physical constraint present | No | No | Yes; NL=NA interlock, window comparator, and PUF attestation chain |
| Ghost Governance possible | Yes — operational norm | Yes — reasoning traces not constitutional commitments | No — eliminated by construction |
| Acceptable at civilizational scale | No | No | Yes |
DITL is a proposal about how to protect specific categories of human beings from specific categories of irreversible harm.
- Civilian populations subject to mass surveillance. A surveillance directive cannot be routed through a DITL-compliant system without generating an immutable, Merkle-anchored audit entry before the surveillance begins. Oversight depends on physics, not on the willingness of anyone in the surveillance chain to report.
- Populations subject to autonomous weapons deployment. At machine speed, autonomous systems can act within time intervals below the threshold at which human oversight intervention is physically possible. The Epistemic Hold re-establishes the constitutional interval at the hardware layer.
- The financial system. Ghost Fills — trades that execute without corresponding audit evidence — are the financial system's structural analogue of Ghost Governance. The NL=NA interlock makes audit a precondition of execution. The pattern is in the record. The record cannot be selectively deleted.
- The institutional fabric of governance itself. The Merkle-anchored log is the witness that cannot be threatened, pressured, or administratively reassigned. The record of what was attempted exists independently of whether those in power want it to.
| Actor | Required Action | Timeline |
|---|---|---|
| TSMC / ASML | Dedicated TaOx RRAM process design kit for N2 node | PDK: 6 months from mandate; first silicon: 12 months; production qualification: 24 months |
| Intel Foundry | TaOx RRAM process development at 18A (domestic alternative) | Follows mandate issuance |
| IEEE | IEEE P-DITL working group: window comparator specs, Governance Lane timing, PUF chain, Epistemic Hold non-bypassability | Working group: 6 months; first draft: 12 months; ballot: 18 months |
| NIST | FIPS for constitutional AI hardware (parallel to IEEE P-DITL if IEEE cannot meet timeline) | 18 months from mandate |
| Legislators | Federal procurement mandate: DITL certification required for all AI systems deployed under federal contract; no classified environment exception | Immediate legislative session |
| Engineering community | Joint technical statement to IEEE New Standards Committee and congressional committees; request hearing | Immediate professional action |
| International | Wassenaar Arrangement amendment; DITL certification treaty with mandatory compliance for signatories' critical infrastructure | Concurrent with domestic mandate |
A DITL-compliant system operating alongside a non-DITL system in the same governance environment does not provide constitutional guarantees. It provides a compliant path and a bypass path simultaneously. A directive refused by the DITL system's window comparator can be reissued to the adjacent non-DITL system. The constitutional guarantee was locally honored and globally defeated.
Two responses are required, neither sufficient alone. First: mandatory DITL certification for all contracts, converting bypass from a costless workaround into a documented contract violation with liability exposure. Second: international coordination producing mandatory DITL certification for all advanced AI systems in signatory nations' critical infrastructure.
The residual risk is the adversarial state-actor scenario. DITL certification creates constitutional infrastructure for those who adopt it. It does not solve the problem of actors who have rejected constitutional constraints as an operating principle. That requires different instruments. The specific contribution of DITL to this scenario is attribution and visibility: an action through a non-DITL system, where DITL is the established norm, is an internationally attributable departure from that norm.
The framework exists. The physics are understood. The fabrication path is real. The architecture is specified with sufficient precision for a hardware design team to begin implementation today.
This is an architectural decision, not a policy decision. Hardware architectures deployed at the scale of critical infrastructure have a different relationship to reversibility than policy decisions. The cost of implementing DITL certification before the architectural lock-in point is finite, measurable, and proportionate. The cost of attempting constitutional hardware reform after the lock-in point is everything built on the assumption that no such reform is coming. The lock-in point does not announce itself. It becomes visible only in retrospect.
The Epistemic Hold is available as a civilizational choice at this moment. The resistance states of tantalum oxide can encode constitutional constraints on the most consequential decision-making systems in human history. The NL=NA interlock can make accountability a physical precondition of execution rather than an aspiration. The window comparator can make Ghost Governance physically impossible rather than structurally probable. What is required is an institutional decision.
The TL framework operates as a Global Decision Systems architecture. Three-state constitutional logic: Proceed (+1), Epistemic Hold (0), Refuse (−1). The Epistemic Hold is the canonical term for the third state — never renamed, reframed, or replaced.
The Eight Pillars: Epistemic Hold, Immutable Ledger, Goukassian Principle, Decision Logs, Economic Rights and Transparency, Sustainable Capital Allocation, Hybrid Shield, Anchors. Full pillar architecture, constitutional governance model, and API specification: DOI 10.1007/s43681-026-01124-0.
NL=NA in Linear Temporal Logic: G(execute implies P(escrow_recorded and auditable)). This formulation admits no exceptions.
Immutable Mandates — beyond the authority of any governance body: No Spy · No Weapon · No Switch Off. Any proposal attempting to modify, suspend, or reinterpret any Immutable Mandate is void from the beginning.
Tri-Cameral Governance: Technical Council (9 members, proposal rights only) · Stewardship Custodians (11 members, binding veto, no proposal rights) · Smart Contract Treasury (automatic execution, no admin key, no pause guardian). Joint-Approval threshold: 75% supermajority independently in both bodies.
Goukassian, L. "Auditable AI: Tracing the Ethical History of a Model." AI and Ethics, Springer Nature. DOI: 10.1007/s43681-025-00910-6. Published December 28, 2025.
Goukassian, L. "A Ternary Logic Framework for Institutional Governance: Addressing the Enforcement Gap in Global Economic Systems." AI and Ethics, Springer Nature. DOI: 10.1007/s43681-026-01124-0.
Author ORCID: 0009-0006-5966-1243. Repositories: FractonicMind/TernaryMoralLogic, FractonicMind/TernaryLogic. Listed as verification resources; not cited as primary academic sources.
G(execute implies P(escrow_recorded and auditable)); a physical architectural constraint enforced by the NL=NA interlock gate and the window comparator's refusal to release the execution lane without Governance Lane confirmation.